1. Field of the Invention
The invention is related to a flat display technology and more particularly, to a display panel and a demultiplexer circuit thereof.
2. Description of Related Art
With progress in manufacturing technologies of semiconductors, volumes of various types of electronic products are also developed toward being light and thin. In other to meet demands for miniaturization of the electronic products, flat panel displays are widely used due to having advantages, such as good space utilization efficiency, high definition, low power consumption, radiation free and so on. Generally, a flat panel display includes elements, such as a backlight module, a display panel and so on. The display panel is composed of pixel arrays, where a source driver transmits data voltages required by the pixel arrays through a plurality of data lines.
In order to resolve an issue of the increase of the number of the data lines due to the increase of the display panel resolution, which leads to the increase of pin numbers of chips of an integrated circuit (IC), a demultiplexer circuit is commonly disposed between the display panel and the source driver. A demultiplexer circuit is typically formed by a plurality of thin film transistors (TFTs). For an N-type TFT, when the TFT is applied with a negative bias voltage for a long time, a stress situation occurs easily. On the other hand, for accurate levels of control signals, a width-to-length ratio of TFT channels is quite large in most cases, and as a result, a stress speed of the TFTs also becomes faster. Therefore, how to mitigate the stress speed for the TFTs in the demultiplexer circuit has become a subject of designing the demultiplexer circuit.